RTL Verification Engineer - Malaysia
RTL Verification Engineer
Strong hands on experience with Methodologies like VMM / OVM / UVM is must.
OVM coding and debug knowledge.
4-12+ years of experience in RTL Verification.
1+ year of experience in PCIE protocol is must.
Proficient knowledge on System Verilog is must.
Modify existing OVM tests to meet the requirements
Write new tests in OVM
Proficient knowledge in developing Testplan is must.
Work experience on developing Testbench at IP/Subsytem level is mandatory
Must have expert understanding of code and functional coverage-driven verification closure
Able to set up and deploy verification strategies based on directed testing
Exposure to industry standard verification tools for simulation and debug
Good debugging and problem solving skills.
Good communication skills and ability & desire to work as a team player