RTL Design Engineer - Santa Clara, CA

Santa Clara, California, United States

Description

RTL Design Engineer

Santa Clara, CA

Fulltime Position

Job Description:

6-8 years of RTL Design experience at Cluster/SoC Level

Sound experience in RTL Design/ASIC Syntheis at cluster and SoC Level is highly desirable

Strong Experience in development of micro architecture Specifications on IP integration and Global Design blocks.

Integration of IPs at Cluster and SoC Level.

Implementation of Low power logic, targeting power, performance, area, and timing goals.

Linting, CDC, LEC and preferably Low Power check tools to implement design

Check design quality Work with Design Verification team on block and top-level functional/gate level verification and code coverage,

including Power aware debug


Thanks

Macropace

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