Design Verification Engineer - Bangalore
Greetings from Macropace Technologies !! Hope you have great day.
We have an opening for below position and though it will match to your resume, appreciate if you can let me know if you are interested towards this position, Thanks.
Design Verification Engineer
Client: CMMI Level 5 Company
Experience : 05 - 20 Years
Joining Time : Immediate - 90 Days
- Minimum of 4-12+ years of experience in Verification.
- Minimum of 1 years of experience in protocols like PCIE or SATA or USB is must.
- Work experience on IP/SOC level verification.
- Proficient knowledge on System Verilog
- Methodology like VMM/OVM/UVM is must.
- Should have good communication and Leadership skils.
- Work experience on Intel IOSF protocol is advantage.
- Proficient knowledge in developing Testplan is must.
- Work experience on developing Testbench at IP/Subsytem level is mandatory.
- Develop design standards and guidelines to ensure quality and performance.
- Prepare design verification plan based on design specifications.
- Plan and schedule assigned projects for timely completion.
- Excellent Communication skills